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RP2350 and Compute Module 5 for Industrial Products

2026-09-05

Should your PLC-next use a microcontroller or a Linux module? Wrong pick here costs you a re-spin: SD cards dying in vibration, USB dropping on a 4-layer board, or a DIN box hitting 85 C in July.

For industrial builds we split work: RP2350 handles real-time control, Compute Module 5 handles display, network and Linux. RP2350 has dual Cortex-M33 or Hazard3 RISC-V at 150 MHz, 520 KB SRAM and 12 PIO state machines. CM5 is a BCM2712 quad A76 SoM with eMMC options and PCIe, USB 3 and dual HDMI.

TL;DR: RP2350 for deterministic I/O. CM5 for display + Linux + network. Always eMMC for field units, 6-layer for PCIe/USB3/HDMI, 5V 5A in, heatsink from day one.

RP2350 side: PIO is the reason to pick it

RP2350 is dual Cortex-M33 or dual Hazard3 RISC-V at 150 MHz, 520 KB SRAM across 10 banks, 3x PIO blocks = 12 state machines. Variants: RP2350A 30 GPIO QFN60, RP2350B 48 GPIO QFN80, RP2354A/B with 2 MB stacked flash. External QSPI up to 16 MB via dedicated bus + 16 MB via second chip-select = 32 MB total, plus PSRAM via QMI.

PIO replaces bit-banging for Modbus timing, WS2812 or step pulses. OTP stores the boot signing key. Assign peripherals and DMA channels to security domains early, not after the board is done.

/* PIO blink is a smoke test, not the product */
pio_sm_put_blocking(pio0, 0, 1);

Real PIO uses: Modbus RTU half-duplex timing, stepper pulse + direction at MHz, DMX512, WS2812, parallel LCD without CPU. Second-gen PIO on RP2350 adds IRQ and stranger protocols than RP2040 could do.

QSPI flash needs a proper footprint for 16 MB parts plus a second chip-select if PSRAM is planned. Pico 2 uses RP2350A + 4 MB external flash — fine for dev, size to 8-16 MB for OTA A/B in product. BootROM probes with 03h serial-read; confirm 02h/05h/06h/20h support if you change vendor.

Security you should actually use (product brief): 8 KB OTP lockable at 128 B, TrustZone + per-peripheral ACCESSCTRL domains, SHA-256 + TRNG + glitch detector, optional signed boot with key fingerprint in OTP (BOOTKEY0 + KEY_VALID), protected OTP for AES boot-decryption. Set SECURE_BOOT_ENABLE in factory provisioning — see Understanding RP2350 security and our provisioning notes below.

CM5 carrier side: eMMC, power, thermal

Compute Module 5 is Broadcom BCM2712 16 nm quad A76 @ 2.4 GHz (512 KB L2 per core + 2 MB L3), VideoCore VII, 4Kp60 HEVC, dual 4Kp60 HDMI, 2/4/8/16 GB LPDDR4-4267 with ECC, eMMC 0/16/32/64 GB up to ~400 MB/s. 0 GB = CM5 Lite with SDIO for microSD. In production to at least Jan 2036. Full pinout in the CM5 datasheet and Compute Module docs.

Use eMMC variants for vibration and power-cut tolerance, not Lite plus SD. Route PCIe, USB 3 and HDMI with impedance control on at least 6 layers. Budget 5 V at 5 A input. Plan a heatsink for DIN enclosures from day one.

I/O you get: 1x PCIe Gen2 x1 5 Gbps, 1x USB2 + 2x USB3 5 Gbps simultaneous, 2x HDMI 2.0 4Kp60, 2x 4-lane MIPI DSI/CSI-2, GigE + 1588, RTC + battery, fan header, up to 30 GPIO at 1.8/3.3 V (5x UART/I2C/SPI). Size 55x40 mm, 2x100-pin HD connectors.

Power math: single +5 V in, USB-PD up to 5 A (25 W). Budget 5 V up to 2.5 A for the module itself, plus USB load (usb_max_current_enable is effectively always on). If your carrier is limited, reduce clocks — do not hope. Pi 5 PSU works for bench; product needs 5V 5A PD or J8 feed with proper copper.

Thermal: BCM2712 is the hotspot. On-chip sensor throttles clocks — check with vcgencmd measure_temp. Do not rely on throttling in a sealed DIN box. Provide heatsink/airflow, ventilated enclosure, Cooler for CM5 or fan header. Raspberry Pi publishes a full thermal-resistance stack model — run it before tooling plastic.

Carrier shortcut: use CM5IO (160x90 mm) as reference — GbE+PoE, 2x USB3, M.2 PCIe, 2x HDMI, 2x MIPI, 40-pin HAT+, fan, RTC battery, USB-C PD. KiCad + STEP free on the Design Files portal. Copy its power + PCIe + HDMI sections, then trim to your I/O.

Split architecture we ship

Task RP2350 CM5
Real-time Modbus, pulses, safety interlock Yes, PIO + DMA No — Linux jitter
Touch display, browser, Qt No Yes, dual HDMI / DSI
Network, VPN, cloud, OTA Light MQTT only Yes, GigE + Wi-Fi opt
Power-cut safe logging FRAM + RTC eMMC + journal + supercap
Secure boot OTP signed boot EEPROM + signed OS

RP2350 talks to CM5 over UART/SPI/USB-serial with CRC + sequence. CM5 never bit-bangs timing. RP2350 never parses JSON cloud payloads. This split survives a Linux update without touching control safety.

Compare low-power sleep thinking with STM32U3 Stop modes if your RP2350 board also needs battery backup.

Provisioning matters at volume

Raspberry Pi now sells a CM5 programming jig with rpi-image-gen and secure boot support. We set up the same flow on our bench so flashing and keys stay repeatable.

Official trio: rpi-image-gen (lightweight builder, used by jig) + pi-gen (full OS) + rpi-sb-provisioner (auto secure-boot). Flow: jig powers DUT -> writes EEPROM (PSU_MAX_CURRENT=5000 if 5A capable) -> provisions keys -> flashes eMMC -> verifies. Keep golden image + SB keys offline, log serial -> key hash per unit.

For RP2350 in same product: pre-provision OTP signing keys on first boot via SWD, lock at 128 B granularity, verify signature before sealing enclosure. Never ship with KEY_INVALID still set.

Bring-up checklist

  1. RP2350: scope QSPI at 100 MHz+, confirm 2nd CS for PSRAM if used.
  2. CM5: 5V 5A PD negotiate, scope droop on Wi-Fi + eMMC burst.
  3. PCIe/USB3/HDMI: 6-layer, 90/100-ohm, length-matched, no stubs. USB eye + PCIe link-train log.
  4. Thermal: 1-hour burn at 45 C ambient, log measure_temp + throttle bits.
  5. Vibration: eMMC only, connectors latched, conformal coat if condensing.
  6. Power-cut: 200x plug-pull during eMMC write, check journal recovery.

FAQ

CM5 or RK3588 for HMI? CM5 for fastest Linux + support to 2036 + Pi ecosystem. RK3588 for 8K/NPU edge AI. See our T113 / RK3566 / RK3588 guide for the Rockchip side.

Lite + SD to save cost? Only for dev. Field vibration + power cuts kill SD. eMMC 16 GB minimum for logging product.

RP2350 or STM32 for control? RP2350 for PIO-heavy protocols and low cost. STM32U3/C0 for ultra-low sleep or 5V legacy. See STM8 migration if replacing old stock.

References

  1. RP2350 product — https://www.raspberrypi.com/products/rp2350/
  2. MCU chips docs — https://www.raspberrypi.com/documentation/microcontrollers/microcontroller-chips.html
  3. RP2350 product brief — https://pip.raspberrypi.com/documents/RP-008374-DS-rp2350-product-brief.pdf
  4. CM5 product — https://www.raspberrypi.com/products/compute-module-5/
  5. CM5 datasheet — https://datasheets.raspberrypi.com/cm5/cm5-datasheet.pdf
  6. Compute Module docs — https://www.raspberrypi.com/documentation/computers/compute-module.html
  7. BCM2712 — https://www.raspberrypi.com/documentation/computers/processors.html#bcm2712
  8. CM5IO design files — https://pip.raspberrypi.com/categories/1098-design-files

Send us your I/O list and display size. We reply with RP2350 versus CM5 split and a carrier plan.

Building something similar?

Send your specs. We reply with scope and cost.

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