STM32 Stop Modes: Stop 1, 2 and 3 Currents on STM32U3
2026-09-20
You picked the STM32U3 for its 1.6 uA Stop 3, but your board reads 48 uA. Did ST lie? No. You are probably on LDO, retaining full SRAM, with debug still powered and two floating pins.
STM32U3 parts run a Cortex-M33 up to 96 MHz, up to 1 MB dual-bank flash + 256 KB SRAM, built on 40 nm near-threshold for battery meters and sensors. ST lists Stop 3 with 8 KB SRAM around 1.6 uA typical at 3 V SMPS, and full SRAM around 2.2 uA. Your board will read higher until the supply and pins are clean.
TL;DR: Need ADC/GPDMA while asleep -> Stop 1. Need LP timer/sensor poll -> Stop 2. Wake on RTC/pin only -> Stop 3. Nothing to keep -> Standby. Always use SMPS, retain 8 KB not full SRAM.
Typical currents — SMPS vs LDO changes everything
All typical @ 25 C, 3.3 V, RTC off unless noted. From DS14861 datasheet:
| Mode | SMPS 8 KB | SMPS full SRAM | LDO 8 KB |
|---|---|---|---|
| Stop 0 / Stop 1 | ~58-59 uA | ~65-66 uA | ~145 uA |
| Stop 2 | 3.8 uA | 4.6 uA | 13 uA |
| Stop 3 | 1.6 uA | 2.2 uA | 4.9 uA |
| Standby, no RTC | 0.33 uA | +0.33 uA for 64 KB SRAM2 | — |
| Shutdown | 0.20 uA | lost | — |
Rule of thumb: SMPS is ~3x better than LDO in Stop 2/3. Stop 0 and Stop 1 look identical in current — the difference is which regulator domain stays on and how fast you wake. RTC-on adds only ~0.3-0.5 uA on SMPS.
If you are on a Nucleo with LDO jumpers, do not chase datasheet numbers. Validate on your SMPS board. The NUCLEO-U385RG-Q is great for function, not for nanoamp truth.
Full state diagram and per-page retention bits are in RM0487 reference manual.
Pick the mode by wakeup source
Stop 1 keeps most of the core domain alive. Stop 2 keeps a small set of autonomous peripherals running. Stop 3 is the lowest with retention but wakeup sources shrink to roughly Standby sources.
Rule we use:
Need ADC or GPDMA while asleep -> Stop 1
Need LP timer or LPUART/I2C poll -> Stop 2
Wake on RTC or pin only -> Stop 3
Nothing to keep -> Standby / Shutdown
Detail from RM0487 Table 80:
- Stop 0: any EXTI. Fastest wake, highest sleep.
- Stop 1: any PWR wakeup line including WKUP pins + I3C reset pattern. DAC, LPTIM1-4, USART, LPUART, SPI, I2C, I3C, ADF, GPDMA can stay autonomous.
- Stop 2: only LPTIM1/3/4, LPUART1, I2C3 + GPDMA for those. Enough for sensor polling without CPU.
- Stop 3 / Standby: WKUP pins, RTC alarm/wakeup, tamper, NRST, IWDG, I3C reset. No autonomous operation.
- Shutdown: like Standby minus IWDG/BOR. Exit is reset, RAM lost.
Wakeup clock is MSIS up to 48 MHz or HSI16, set by STOPWUCK. Standby wakes on MSIS 3-12 MHz. Plan re-init of PLL Clocks after wake — do not assume they survived.
Same decision logic applies to Nordic parts — see our nRF54L15 System OFF guide for the GRTC equivalent. For the Linux bring-up side of a battery meter gateway, see our T113 / RK3566 / RK3588 checklist.
SRAM retention: keep 8 KB, not full
Keep 8 KB, not full SRAM. Full retention on U3 adds microamps for no reason if your state fits in a small block.
U3 SRAM is 192 KB SRAM1 + 64 KB SRAM2. Retention is per-page via PWR_CR2 xRAMyPDS bits: SRAM1 is 2x16 KB + 5x32 KB pages, SRAM2 is 32+24+8 KB. In Standby only SRAM2 is retainable (none / 8 / 24 / 32 / 64 KB via RRS bits). Backup registers + RTC stay on in VBAT mode anyway.
Pattern:
- Pack wake state (sensor calibration, counters, RTC backup regs) into one 8 KB SRAM2 block.
- Gate off SRAM1 pages in Stop 2/3.
- In Standby retain 8 KB SRAM2 (+0.13 uA) instead of full 64 KB (+0.33 uA).
- VBAT pin backs RTC/TAMP/LSE + 32x32-bit backup regs through auto VDD/VBAT switch. No battery? Tie VBAT to VDD + 100 nF. Charging via internal 5k / 1.5k resistor if you have a supercap.
VBAT current with RTC on LSE is ~0.4-0.6 uA — include it in multi-year meter math.
RTC wakeup code that actually sleeps
HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, 600, RTC_WAKEUPCLOCK_CK_SPRE_16BITS);
HAL_PWREx_EnterSTOP3Mode(PWR_STOPENTRY_WFI);
Wake on RTC, re-init clocks, sample, store, sleep again. Full loop we ship:
__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU);
HAL_RTCEx_SetWakeUpTimer_IT(&hrtc, WAKE_S, RTC_WAKEUPCLOCK_CK_SPRE_16BITS);
HAL_PWREx_EnterSTOP3Mode(PWR_STOPENTRY_WFI);
/* wake: SystemInit clocks, MX_ re-init, sample, store to retained SRAM */
Gotchas that cost 20 uA each:
- Debug with
DBG_STOP/DBG_STANDBYbits only during development. Leaving debug powered in Stop hides the real current and keeps clocks alive. See RM0487 DBGMCU chapter. - Turn off input buffers on analog pins, set unused GPIO to analog or pulled output. Two floating pins swamp Stop 3.
- SMPS vs LDO jumper. Confirm
SMPSENand inductor populated. - LSE vs LSI. LSE is slower to start but far more accurate for RTC billing intervals. LSI ±5% drifts minutes per day.
- Re-init: ADC calibration, flash wait states, and
STOPWUCKclock after every Stop 3 exit.
Examples live in STM32CubeU3. Start from PWR Stop examples, not from a full HAL demo with USB + debug on.
SMPS, layout, and measurement
ST Run efficiency is 9.5 uA/MHz (While-1, SMPS) — but Stop current is dominated by leakage + supply. Checklist before you blame silicon:
- Scope PMIC rails at wake edge. Droop resets look like firmware bugs.
- Inductor + caps per datasheet within 5 mm, solid ground.
- Measure with a source-meter (PPK2 / Joulescope), not a multimeter averaging.
- Release build, debug cut, reset then sleep. Debugger attached = +mA.
- 60 s capture: run -> Stop 3 -> RTC wake -> sample -> sleep. Integrate.
If you need BLE instead of just RTC wake, pair U3 as sensor host with a Nordic radio — architecture in our nRF54L15 post.
FAQ
Stop 2 or Stop 3 for a 1-minute temperature logger? Stop 3. Wake on RTC only, 8 KB retained. Expect ~2 uA sleep + ~5 ms run at 9.5 uA/MHz. CR2032 lasts years.
When is Stop 1 worth it? When ADC + DMA must sample while CPU sleeps, or USB/FDCAN context must survive. Otherwise Stop 2 does the same polling for 15x less current.
Why is my Stop 3 at 14 uA? LDO mode, full SRAM, debug on, or floating pins — in that order. Fix supply first.
Standby vs Shutdown? Standby keeps SRAM2 + RTC + BOR (0.33 uA). Shutdown drops to 0.20 uA but loses RAM and BOR. Meters that bill use Standby; disposable loggers use Shutdown.
References
- STM32U3 series — https://www.st.com/en/microcontrollers-microprocessors/stm32u3-series.html
- STM32U375/385 — https://www.st.com/en/microcontrollers-microprocessors/stm32u375-385.html
- Datasheet DS14861 — https://www.st.com/resource/en/datasheet/stm32u375rg.pdf
- Reference manual RM0487 — https://www.st.com/resource/en/reference_manual/rm0487-stm32u3-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
- STM32CubeU3 — https://www.st.com/en/embedded-software/stm32cubeu3.html
- NUCLEO-U385RG-Q — https://www.st.com/en/evaluation-tools/nucleo-u385rg-q.html
- ST press release — https://newsroom.st.com/media-center/press-item.html/p4678.html
Send us your wake period and pin list. We reply with the mode choice and a power budget.